安全与密码学2018newsroom.intel.com
Intel 对推测执行侧信道的分析
Intel Analysis of Speculative Execution Side Channels
进阶 · 约 60 分钟读完前置知识：推测执行与分支预测基础、x86 MSR/系统编程基础、Spectre/Meltdown 背景
导读
这是 Intel 针对幽灵（Spectre）和熔毁（Meltdown）推测执行侧信道漏洞发布的官方分析白皮书。文档首次公开了用于缓解 Spectre 的新增 MSR 寄存器（IBRS、STIBP、IBPB），说明系统软件如何配合微码更新限制推测执行带来的间接分支预测泄露，并强调这些问题不限于 Intel 处理器、不违反处理器规格。
HN 关注点：这是 Meltdown/Spectre 曝光后 Intel 的首份官方技术回应，HN 读者关注其中的缓解机制细节，以及 Intel 回避芯片缺陷的措辞。
后来怎么样
作为 Intel 对 Spectre/Meltdown 的官方回应，白皮书引入的 IBRS、STIBP、IBPB 等 MSR 成为操作系统和固件缓解推测执行侧信道的标准机制，被 Linux、Windows 等广泛实现。
HN 评论精选
这几条评论里：质疑 2 补充 2
补充文档首次披露了缓解 Spectre 的关键新 MSR 控制项，对系统软件开发者非常重要
我很惊讶这份文档之前没人提交，也没人点赞。补充一些背景：这份文档首次公开披露了若干新增的 MSR，让系统软件能够协助缓解 Spectre。具体包括限制推测的几个控制项：IBRS（限制间接分支的推测）、STIBP（防止间接分支预测被兄弟超线程控制，注意是超线程！）、IBPB（限制对后续间接分支预测的影响）。对需要为新微码实现系统软件支持的人来说，这是非常重要的信息。
bcantrill查看英文原文
I was surprised that this wasn't already submitted -- and then surprised again that it's not being upvoted. To give some color: this doc contains the first public disclosure of some new MSRs being added to allow system software to help mitigate Spectre. In particular, these are the controls to limit speculation including Indirect Branch Restricted Speculation (IBRS) to restrict speculation of indirect branches; Single Thread Indirect Branch Predictors (STIBP) to prevent indirect branch predictions from being controlled by the sibling hyperthread (!!) and Indirect Branch Predictor Barrier (IBPB) to limit influence on later indirect branch predictions. For those who need to implement system software support for the new microcode, this is very important information!
质疑批评 Intel 用'符合规格'的说辞推卸 Meltdown 责任，表示将考虑换用其他厂商
Intel 似乎执意在各处强调其处理器是按设计、按规格正常工作的。Spectre 这事我不怪他们，但 Meltdown 就很离谱了。如果这就是他们想要的规格质量，我会改用其他规格更合理、bug 更少的公司的处理器。
wilun查看英文原文
Intel seems committed to write everywhere that their current processors work as intended and according to their specification. I'm not mad at them for Spectre, but Meltdown is ridiculous. If this is the quality of specification they want to reach, I'll use processors from another company that seems to have saner and less buggy specifications.
质疑认为 Intel 的措辞是律师为应对集体诉讼而刻意回避'缺陷'一词
引用白皮书：'这些方法依赖于高性能微处理器的共同特性……易感性不仅限于 Intel 处理器，也不意味着处理器工作超出了其预期的功能规格。'鉴于 Project Zero 披露后已有集体诉讼被提起，我怀疑 Intel 的律师正在竭尽全力避免任何表明其芯片存在缺陷的表述。
infamouscow查看英文原文
> These methods rely on common properties of both high-performance microprocessors modern operating systems and susceptibility is not limited to Intel processors, nor does it imply the processor is working outside its intended functional specification. Given a class-action was filed after the Project Zero reveal [1], I suspect Intel's lawyers are doing everything they can to avoid any indication there is a defect in their chips. [1]: https://www.courthousenews.com/wp-content/uploads/2018/01/Intel-Flaws-COMPLAINT.pdf
补充发现白皮书中微码更新适用范围（Broadwell+）与 LKML 此前说法（Skylake+）不一致，求证
据我所知，这份白皮书至少有一条新消息：缓解'变体2'所需的微码更新范围是 Broadwell 及之后，而不是昨天 LKML 上说的 Skylake 及之后。Intel PDF 写道：'对于 Broadwell 及之后的 Intel Core 处理器，retpoline 缓解策略还需要应用微码更新才能完全生效。'而 LKML 上的讨论似乎指向 Skylake+，并指出在 Skylake 上 retpoline 很难可靠使用（RSB 可能被清空导致漏洞），计划改用 IBRS。我不完全确定细节，有人能确认 Skylake+ vs Broadwell+ 是否有变化吗？
puddums查看英文原文
As far as I can tell, one bit of news to me at least in this Intel whitepaper from today is that the microcode update to mitigate “variant #2” would be needed for Broadwell+, rather than the Skylake+ that had been stated yesterday on LKML. From Intel's PDF today: "For Intel® Core™ processors of the Broadwell generation and later, this retpoline mitigation strategy also requires a microcode update to be applied for the mitigation to be fully effective." vs. at least what I had seen on LKML list yesterday seemed to indicate Skylake+. Sample snippet from LKML[1]: "The x86 IBRS feature requires corresponding microcode support. It mitigates the variant 2 vulnerability..." and related sample snippet from LKML[2]: "On Skylake the target for a 'ret' instruction may also come from the BTB. So if you ever let the RSB (which remembers where the 'call's came from get empty, you end up vulnerable. Other than the obvious call stack of more than 16 calls in depth, there's also a big list of other things which can empty the RSB, including an SMI. Which basically makes retpoline on Skylake+ very hard to use reliably. The plan is to use IBRS there and not retpoline." I'll confess I'm not 100% following all the ins and outs of this, but can anyone comment on any additional details regarding the Skylake+ vs. Broadwell+, and/or confirm if there was seemingly a change? [1] https://lkml.org/lkml/2018/1/4/615 [2] https://lkml.org/lkml/2018/1/4/708
历次讨论
- 2018Hacker News 讨论帖380 分 · 34 评
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